`include "defines.v"
module ysyx_210448_id_stage(
  input clk,
  input wire rst,
  input wire [63:0] if_pc,
  input wire [31 : 0]id_inst,
  output wire [4 : 0]id_rd,
  output wire [6:0] id_opcode,
  output wire [19 : 0]id_u_imm,
  output wire [19 : 0]id_j_imm,
  output wire [11 : 0]id_j_imm_j,
  output wire [11 : 0]id_i_imm,
  output wire [11 : 0]id_I_imm,
  output wire [6 : 0]id_b_imm,
  output wire [6 : 0]id_s_imm,
  output wire [4 : 0]id_s_imm_s,
  output wire [4 : 0]id_b_imm_b,
  output wire [11:0]id_w_imm,
  output wire [5:0]id_w_shamt,
  output wire [2:0] id_s1,
  output wire id_s2,
  output wire [5:0]id_shamt,
  output wire [11:0]id_csr,
  output wire [4:0]id_zimm,
  output wire id_csr_read,
  output wire id_csr_write,
  output wire [4:0] id_rs1,
  output wire [4:0] id_rs2,
  output wire id_ena1,
  output wire id_ena2,
  output wire id_exe_en
);

//rs1,rs2为寄存器的编号，ena1,en2为对应的寄存器读信号，rd是写寄存器编号，s1为判断具体的指令，s2作用同上，其余带imm均为立即数

assign id_exe_en=1'b1;
assign id_opcode=id_inst[6 : 0];
assign id_rs1=(id_opcode==7'b1100111|id_opcode==7'b0000011|id_opcode==7'b0010011|id_opcode==7'b1100011|id_opcode==7'b0100011|id_opcode==7'b0110011|id_opcode==7'b0011011|id_opcode==7'b0111011|id_opcode==7'b1110011)?id_inst[19:15]:((id_opcode==7'b1111011)?5'h0a:0);
assign id_rs2=(id_opcode==7'b1100011|id_opcode==7'b0100011|id_opcode==7'b0110011|id_opcode==7'b0111011)?id_inst[24:20]:0;
assign id_ena1=(id_opcode==7'b1100111|id_opcode==7'b0000011|id_opcode==7'b0010011|id_opcode==7'b1100011|id_opcode==7'b0100011|id_opcode==7'b0110011|id_opcode==7'b0011011|id_opcode==7'b0111011|id_opcode==7'b1111011|id_opcode==7'b1110011)?1:0;
assign id_ena2=(id_opcode==7'b1100011|id_opcode==7'b0100011|id_opcode==7'b0110011|id_opcode==7'b0111011)?1:0;
assign id_rd=(id_opcode==7'b0110111|id_opcode==7'b0010111|id_opcode==7'b1101111|id_opcode==7'b0000011|id_opcode==7'b0010011|id_opcode==7'b0110011|id_opcode==7'b1100111|id_opcode==7'b0011011|id_opcode==7'b0111011|id_opcode==7'b1110011)?id_inst[11:7]:0;
assign id_s1=(id_opcode==7'b0000011|id_opcode==7'b0010011|id_opcode==7'b1100011|id_opcode==7'b0100011|id_opcode==7'b0110011|id_opcode==7'b0111011|id_opcode==7'b0011011|id_opcode==7'b1110011)?id_inst[14:12]:0;
assign id_s2=(id_opcode==7'b0010011|id_opcode==7'b0110011|id_opcode==7'b0111011|id_opcode==7'b0011011)?id_inst[30]:0;
assign id_u_imm=(id_opcode==7'b0110111|id_opcode==7'b0010111)?id_inst[31:12]:0;
assign id_j_imm=(id_opcode==7'b1101111)?id_inst[31:12]:0;
assign id_j_imm_j=(id_opcode==7'b1100111)?id_inst[31:20]:0;
assign id_I_imm=(id_opcode==7'b0000011)?id_inst[31:20]:0;
assign id_i_imm=(id_opcode==7'b0010011)?id_inst[31:20]:0;
assign id_shamt=(id_opcode==7'b0010011)?id_inst[25:20]:0;
assign id_b_imm=(id_opcode==7'b1100011)?id_inst[31:25]:0;
assign id_b_imm_b=(id_opcode==7'b1100011)?id_inst[11:7]:0;
assign id_s_imm=(id_opcode==7'b0100011)?id_inst[31:25]:0;
assign id_s_imm_s=(id_opcode==7'b0100011)?id_inst[11:7]:0;
assign id_w_imm=(id_opcode==7'b0011011)?id_inst[31:20]:0;
assign id_w_shamt=(id_opcode==7'b0011011)?id_inst[25:20]:0;
assign id_csr=(id_opcode==7'b1110011)?id_inst[31:20]:0;
assign id_zimm=(id_opcode==7'b1110011)?id_inst[19:15]:0;
assign id_csr_read=(id_opcode==7'b1110011)?1:0;
assign id_csr_write=(id_opcode==7'b1110011)?1:0;

endmodule

